'Digital SiPMs' are chips that contain Single Photon sensitive Avalanche photoDiodes (SPADs) and CMOS readout logic on the same silicon die. There sensors can be an interesting alternative to classical PMTs or SiPMs in many application. The readout logic must be tailored to the specific application, so that the loss of photo sensitive area introduced by the CMOS part is minimised. An engineering run with several different architectures has been received back and first chips have been successfully tested.