The first step of the image processing takes place in the EDDA-Chip (EDge Detection Array). EDDA converts the analog grayscale image from the logarithmic camera into a digitally coded edge image. The algorithm is based on an analog resistive fuses network, whose individual elements' resistance increases sharply past an adjustable voltage threshold. This nonlinear behaviour contrasts the effect of those resistances where the applied voltage is still below the threshold. Here behaviour similar to a Gaussian smoothing filter can be observed. Both effects result in segmentation of the grayscale image with smoothing adapted to the image structure without loosing any edges in the course of filtering. This process can be repeated with the same image data. By means of varying the temporal course of the above mentioned threshold voltage or the parameters of the resistive fuses network the segmentation can be controlled, for example in order to reduce the number of extracted edges in case of too many details in the original image. EDDA consists of 4356 cells. Each cell contains analog memory to store the grayscale value as well as the resistance of the interconnections to its immediate neighbours. A comparator for each one keeps track of the voltage across these resistances and turns them off in case the chosen threshold is exceeded. The resistances are put into practice by Switched-Capacitor technology; the comparators are made from switched Sense-Amplifier Flip-Flops. EDDA is connected to the digital image processing system by means of a synchronous bidirectional 8 bit bus.
Electronic Vision(s) Group – Dr. Johannes Schemmel
Im Neuenheimer Feld 227
69120 Heidelberg
Germany
phone: +49 6221 549849
fax: +49 6221 549839
email: schemmel(at)kip.uni-heidelberg.de
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